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<div class="title">xhdcp22_rng_hw.h File Reference</div>  </div>
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Macros</h2></td></tr>
<tr class="memitem:ga5eed3855470b5a7c6412d9a513909763"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hdcp22__rng__v1__1.html#ga5eed3855470b5a7c6412d9a513909763">XHDCP22_RNG_HW_H</a></td></tr>
<tr class="memdesc:ga5eed3855470b5a7c6412d9a513909763"><td class="mdescLeft">&#160;</td><td class="mdescRight">&lt; Prevent circular inclusions by using protection macros  <a href="group__hdcp22__rng__v1__1.html#ga5eed3855470b5a7c6412d9a513909763">More...</a><br /></td></tr>
<tr class="separator:ga5eed3855470b5a7c6412d9a513909763"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8a57666026351d255bf7e60f411dcc44"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hdcp22__rng__v1__1.html#ga8a57666026351d255bf7e60f411dcc44">XHDCP22_RNG_VER_ID_OFFSET</a>&#160;&#160;&#160;((XHDCP22_RNG_VER_BASE)+(0*4))</td></tr>
<tr class="memdesc:ga8a57666026351d255bf7e60f411dcc44"><td class="mdescLeft">&#160;</td><td class="mdescRight">VER Identification register * register offset.  <a href="group__hdcp22__rng__v1__1.html#ga8a57666026351d255bf7e60f411dcc44">More...</a><br /></td></tr>
<tr class="separator:ga8a57666026351d255bf7e60f411dcc44"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga53979633643a30a920e5db152b5aef63"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hdcp22__rng__v1__1.html#ga53979633643a30a920e5db152b5aef63">XHDCP22_RNG_VER_VERSION_OFFSET</a>&#160;&#160;&#160;((XHDCP22_RNG_VER_BASE)+(1*4))</td></tr>
<tr class="memdesc:ga53979633643a30a920e5db152b5aef63"><td class="mdescLeft">&#160;</td><td class="mdescRight">VER Version register * offset.  <a href="group__hdcp22__rng__v1__1.html#ga53979633643a30a920e5db152b5aef63">More...</a><br /></td></tr>
<tr class="separator:ga53979633643a30a920e5db152b5aef63"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae66a591c0a0be5b7980fb6faa4eb0e8f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hdcp22__rng__v1__1.html#gae66a591c0a0be5b7980fb6faa4eb0e8f">XHDCP22_RNG_REG_CTRL_OFFSET</a>&#160;&#160;&#160;((XHDCP22_RNG_REG_BASE)+(0*4))</td></tr>
<tr class="memdesc:gae66a591c0a0be5b7980fb6faa4eb0e8f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Control register * register offset.  <a href="group__hdcp22__rng__v1__1.html#gae66a591c0a0be5b7980fb6faa4eb0e8f">More...</a><br /></td></tr>
<tr class="separator:gae66a591c0a0be5b7980fb6faa4eb0e8f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac8b533da7335a9a21ab8f5f1b57ebd02"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hdcp22__rng__v1__1.html#gac8b533da7335a9a21ab8f5f1b57ebd02">XHDCP22_RNG_REG_CTRL_SET_OFFSET</a>&#160;&#160;&#160;((XHDCP22_RNG_REG_BASE)+(1*4))</td></tr>
<tr class="memdesc:gac8b533da7335a9a21ab8f5f1b57ebd02"><td class="mdescLeft">&#160;</td><td class="mdescRight">Control set register * offset.  <a href="group__hdcp22__rng__v1__1.html#gac8b533da7335a9a21ab8f5f1b57ebd02">More...</a><br /></td></tr>
<tr class="separator:gac8b533da7335a9a21ab8f5f1b57ebd02"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga49a373a2aac559d5d49fb18dbb63dbde"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hdcp22__rng__v1__1.html#ga49a373a2aac559d5d49fb18dbb63dbde">XHDCP22_RNG_REG_CTRL_CLR_OFFSET</a>&#160;&#160;&#160;((XHDCP22_RNG_REG_BASE)+(2*4))</td></tr>
<tr class="memdesc:ga49a373a2aac559d5d49fb18dbb63dbde"><td class="mdescLeft">&#160;</td><td class="mdescRight">Control clear register * offset.  <a href="group__hdcp22__rng__v1__1.html#ga49a373a2aac559d5d49fb18dbb63dbde">More...</a><br /></td></tr>
<tr class="separator:ga49a373a2aac559d5d49fb18dbb63dbde"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga918170eea53b0da5f373cf31d5f4ac34"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hdcp22__rng__v1__1.html#ga918170eea53b0da5f373cf31d5f4ac34">XHDCP22_RNG_REG_STA_OFFSET</a>&#160;&#160;&#160;((XHDCP22_RNG_REG_BASE)+(3*4))</td></tr>
<tr class="memdesc:ga918170eea53b0da5f373cf31d5f4ac34"><td class="mdescLeft">&#160;</td><td class="mdescRight">Status register * offset.  <a href="group__hdcp22__rng__v1__1.html#ga918170eea53b0da5f373cf31d5f4ac34">More...</a><br /></td></tr>
<tr class="separator:ga918170eea53b0da5f373cf31d5f4ac34"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga03d330ac1cbe3923383b7a0c0efed3e2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hdcp22__rng__v1__1.html#ga03d330ac1cbe3923383b7a0c0efed3e2">XHDCP22_RNG_REG_RN_1_OFFSET</a>&#160;&#160;&#160;((XHDCP22_RNG_REG_BASE)+(4*4))</td></tr>
<tr class="memdesc:ga03d330ac1cbe3923383b7a0c0efed3e2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Random number register 1 * offset.  <a href="group__hdcp22__rng__v1__1.html#ga03d330ac1cbe3923383b7a0c0efed3e2">More...</a><br /></td></tr>
<tr class="separator:ga03d330ac1cbe3923383b7a0c0efed3e2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf8cef3c6e7b5a163e443714753ad3114"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hdcp22__rng__v1__1.html#gaf8cef3c6e7b5a163e443714753ad3114">XHDCP22_RNG_REG_RN_2_OFFSET</a>&#160;&#160;&#160;((XHDCP22_RNG_REG_BASE)+(5*4))</td></tr>
<tr class="memdesc:gaf8cef3c6e7b5a163e443714753ad3114"><td class="mdescLeft">&#160;</td><td class="mdescRight">Random number 2 * offset.  <a href="group__hdcp22__rng__v1__1.html#gaf8cef3c6e7b5a163e443714753ad3114">More...</a><br /></td></tr>
<tr class="separator:gaf8cef3c6e7b5a163e443714753ad3114"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae86aafee8690f7840c5f0a90ee3a7528"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hdcp22__rng__v1__1.html#gae86aafee8690f7840c5f0a90ee3a7528">XHDCP22_RNG_REG_RN_3_OFFSET</a>&#160;&#160;&#160;((XHDCP22_RNG_REG_BASE)+(6*4))</td></tr>
<tr class="memdesc:gae86aafee8690f7840c5f0a90ee3a7528"><td class="mdescLeft">&#160;</td><td class="mdescRight">Random number 3 * offset.  <a href="group__hdcp22__rng__v1__1.html#gae86aafee8690f7840c5f0a90ee3a7528">More...</a><br /></td></tr>
<tr class="separator:gae86aafee8690f7840c5f0a90ee3a7528"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga09f9e56c3208fb6a1d9ad8b8d35f3ff2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hdcp22__rng__v1__1.html#ga09f9e56c3208fb6a1d9ad8b8d35f3ff2">XHDCP22_RNG_REG_RN_4_OFFSET</a>&#160;&#160;&#160;((XHDCP22_RNG_REG_BASE)+(7*4))</td></tr>
<tr class="memdesc:ga09f9e56c3208fb6a1d9ad8b8d35f3ff2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Random number 4 * offset.  <a href="group__hdcp22__rng__v1__1.html#ga09f9e56c3208fb6a1d9ad8b8d35f3ff2">More...</a><br /></td></tr>
<tr class="separator:ga09f9e56c3208fb6a1d9ad8b8d35f3ff2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga833523f96ed484c7e93badf96486e87c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hdcp22__rng__v1__1.html#ga833523f96ed484c7e93badf96486e87c">XHDCP22_RNG_REG_CTRL_RUN_MASK</a>&#160;&#160;&#160;(1&lt;&lt;0)</td></tr>
<tr class="memdesc:ga833523f96ed484c7e93badf96486e87c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Control register Run mask.  <a href="group__hdcp22__rng__v1__1.html#ga833523f96ed484c7e93badf96486e87c">More...</a><br /></td></tr>
<tr class="separator:ga833523f96ed484c7e93badf96486e87c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaac22781a50c0d69ab6cce05eaa282685"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hdcp22__rng__v1__1.html#gaac22781a50c0d69ab6cce05eaa282685">XHDCP22_RNG_REG_CTRL_IE_MASK</a>&#160;&#160;&#160;(1&lt;&lt;1)</td></tr>
<tr class="memdesc:gaac22781a50c0d69ab6cce05eaa282685"><td class="mdescLeft">&#160;</td><td class="mdescRight">Control register Interrupt Enable mask.  <a href="group__hdcp22__rng__v1__1.html#gaac22781a50c0d69ab6cce05eaa282685">More...</a><br /></td></tr>
<tr class="separator:gaac22781a50c0d69ab6cce05eaa282685"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa5a077aaf4bd66ea33276fbe8b812824"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hdcp22__rng__v1__1.html#gaa5a077aaf4bd66ea33276fbe8b812824">XHDCP22_RN_REG_STA_IRQ_MASK</a>&#160;&#160;&#160;(1&lt;&lt;0)</td></tr>
<tr class="memdesc:gaa5a077aaf4bd66ea33276fbe8b812824"><td class="mdescLeft">&#160;</td><td class="mdescRight">Status register interrupt mask.  <a href="group__hdcp22__rng__v1__1.html#gaa5a077aaf4bd66ea33276fbe8b812824">More...</a><br /></td></tr>
<tr class="separator:gaa5a077aaf4bd66ea33276fbe8b812824"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf46b5191a882cce3f77a21bea0090273"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hdcp22__rng__v1__1.html#gaf46b5191a882cce3f77a21bea0090273">XHDCP22_RN_REG_STA_EVT_MASK</a>&#160;&#160;&#160;(1&lt;&lt;1)</td></tr>
<tr class="memdesc:gaf46b5191a882cce3f77a21bea0090273"><td class="mdescLeft">&#160;</td><td class="mdescRight">Status register event mask.  <a href="group__hdcp22__rng__v1__1.html#gaf46b5191a882cce3f77a21bea0090273">More...</a><br /></td></tr>
<tr class="separator:gaf46b5191a882cce3f77a21bea0090273"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga80e6797beb7aea9d2af847825d596a2c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hdcp22__rng__v1__1.html#ga80e6797beb7aea9d2af847825d596a2c">XHDCP22_RNG_SHIFT_16</a>&#160;&#160;&#160;16</td></tr>
<tr class="memdesc:ga80e6797beb7aea9d2af847825d596a2c"><td class="mdescLeft">&#160;</td><td class="mdescRight">16 shift value  <a href="group__hdcp22__rng__v1__1.html#ga80e6797beb7aea9d2af847825d596a2c">More...</a><br /></td></tr>
<tr class="separator:ga80e6797beb7aea9d2af847825d596a2c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga147e84ce2dd3dae51899f2119d26353c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hdcp22__rng__v1__1.html#ga147e84ce2dd3dae51899f2119d26353c">XHDCP22_RNG_MASK_16</a>&#160;&#160;&#160;0xFFFF</td></tr>
<tr class="memdesc:ga147e84ce2dd3dae51899f2119d26353c"><td class="mdescLeft">&#160;</td><td class="mdescRight">16 bit mask value  <a href="group__hdcp22__rng__v1__1.html#ga147e84ce2dd3dae51899f2119d26353c">More...</a><br /></td></tr>
<tr class="separator:ga147e84ce2dd3dae51899f2119d26353c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaba6489a8e046d1fa6f482e60a19d3dc5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hdcp22__rng__v1__1.html#gaba6489a8e046d1fa6f482e60a19d3dc5">XHDCP22_RNG_VER_ID</a>&#160;&#160;&#160;0x2200</td></tr>
<tr class="memdesc:gaba6489a8e046d1fa6f482e60a19d3dc5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Version ID.  <a href="group__hdcp22__rng__v1__1.html#gaba6489a8e046d1fa6f482e60a19d3dc5">More...</a><br /></td></tr>
<tr class="separator:gaba6489a8e046d1fa6f482e60a19d3dc5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">Register access macro definition</div></td></tr>
<tr class="memitem:ga901eb34b54b6bc1db1fbbd2fa98fece4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hdcp22__rng__v1__1.html#ga901eb34b54b6bc1db1fbbd2fa98fece4">XHdcp22Rng_In32</a>&#160;&#160;&#160;Xil_In32</td></tr>
<tr class="memdesc:ga901eb34b54b6bc1db1fbbd2fa98fece4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Input Operations.  <a href="group__hdcp22__rng__v1__1.html#ga901eb34b54b6bc1db1fbbd2fa98fece4">More...</a><br /></td></tr>
<tr class="separator:ga901eb34b54b6bc1db1fbbd2fa98fece4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3683d6d36c1ec5c3e3da08e9e1f9db2a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hdcp22__rng__v1__1.html#ga3683d6d36c1ec5c3e3da08e9e1f9db2a">XHdcp22Rng_Out32</a>&#160;&#160;&#160;Xil_Out32</td></tr>
<tr class="memdesc:ga3683d6d36c1ec5c3e3da08e9e1f9db2a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Output Operations.  <a href="group__hdcp22__rng__v1__1.html#ga3683d6d36c1ec5c3e3da08e9e1f9db2a">More...</a><br /></td></tr>
<tr class="separator:ga3683d6d36c1ec5c3e3da08e9e1f9db2a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3ae6850ae9b44be5a7e6d44e4ec471b9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hdcp22__rng__v1__1.html#ga3ae6850ae9b44be5a7e6d44e4ec471b9">XHdcp22Rng_ReadReg</a>(BaseAddress,  RegOffset)&#160;&#160;&#160;<a class="el" href="group__hdcp22__rng__v1__1.html#ga901eb34b54b6bc1db1fbbd2fa98fece4">XHdcp22Rng_In32</a>((BaseAddress) + ((u32)RegOffset))</td></tr>
<tr class="memdesc:ga3ae6850ae9b44be5a7e6d44e4ec471b9"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro reads a value from a HDCP22 RNG register.  <a href="group__hdcp22__rng__v1__1.html#ga3ae6850ae9b44be5a7e6d44e4ec471b9">More...</a><br /></td></tr>
<tr class="separator:ga3ae6850ae9b44be5a7e6d44e4ec471b9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac58e8a713f192274a99a0b968e86cf74"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hdcp22__rng__v1__1.html#gac58e8a713f192274a99a0b968e86cf74">XHdcp22Rng_WriteReg</a>(BaseAddress,  RegOffset,  Data)&#160;&#160;&#160;<a class="el" href="group__hdcp22__rng__v1__1.html#ga3683d6d36c1ec5c3e3da08e9e1f9db2a">XHdcp22Rng_Out32</a>((BaseAddress) + ((u32)RegOffset), (u32)(Data))</td></tr>
<tr class="memdesc:gac58e8a713f192274a99a0b968e86cf74"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro writes a value to a HDCP22 RNG register.  <a href="group__hdcp22__rng__v1__1.html#gac58e8a713f192274a99a0b968e86cf74">More...</a><br /></td></tr>
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<tr class="memitem:gafbd50a98e3ad1aa99ee9782aa84d6ac7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hdcp22__rng__v1__1.html#gafbd50a98e3ad1aa99ee9782aa84d6ac7">XHdcp22Rng_GetStatusReg</a>(BaseAddress)&#160;&#160;&#160;<a class="el" href="group__hdcp22__rng__v1__1.html#ga3ae6850ae9b44be5a7e6d44e4ec471b9">XHdcp22Rng_ReadReg</a>(BaseAddress, <a class="el" href="group__hdcp22__rng__v1__1.html#ga918170eea53b0da5f373cf31d5f4ac34">XHDCP22_RNG_REG_STA_OFFSET</a>)</td></tr>
<tr class="memdesc:gafbd50a98e3ad1aa99ee9782aa84d6ac7"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro reads the status register from the HDCP22 RNG.  <a href="group__hdcp22__rng__v1__1.html#gafbd50a98e3ad1aa99ee9782aa84d6ac7">More...</a><br /></td></tr>
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<tr class="memitem:gabd91ad4f7f8a7f38f9c1acaf429e7db0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hdcp22__rng__v1__1.html#gabd91ad4f7f8a7f38f9c1acaf429e7db0">XHdcp22Rng_GetControlReg</a>(BaseAddress)&#160;&#160;&#160;<a class="el" href="group__hdcp22__rng__v1__1.html#ga3ae6850ae9b44be5a7e6d44e4ec471b9">XHdcp22Rng_ReadReg</a>(BaseAddress, <a class="el" href="group__hdcp22__rng__v1__1.html#gae66a591c0a0be5b7980fb6faa4eb0e8f">XHDCP22_RNG_REG_CTRL_OFFSET</a>)</td></tr>
<tr class="memdesc:gabd91ad4f7f8a7f38f9c1acaf429e7db0"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro reads the control register from the HDCP22 RNG.  <a href="group__hdcp22__rng__v1__1.html#gabd91ad4f7f8a7f38f9c1acaf429e7db0">More...</a><br /></td></tr>
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